1. Field of the Invention
The invention relates to a memory device and, more particularly, to a static random access memory (SRAM) which can perform a read/write operation on memory cells on one word line several times continuously, thereby decreasing the number of times that the pre-charging operation is performed and reducing power consumption.
2. Description of the Related Art
Generally, the control circuit of a static random access memory (SRAM) device controls a decoder according a single clock signal for selecting corresponding memory cells. Whenever the positive edge of the clock signal occurs, the control circuit locks the address one time for selecting a corresponding word line and bit line (that is, for selecting the corresponding memory cell). At this time, the memory device performs a pre-charging operation on the corresponding word line first, and then performs a read/word operation of one bit for the corresponding memory cell. Thus, whenever the positive edge of the clock signal occurs, the memory device performs the pre-charging operation one time. However, a surge current is induced on the word lines and the bit lines by the pre-charging operation. Referring to FIG. 1, at whatever time the positive edge of the clock signal CLK occurs, the supply current IVDD is pulled down suddenly by the induced surge current, which increases power consumption during the operation of the memory device.